Title :
A new CAM macro for 622 Mbps ATM cell processing
Author :
Odagiri, Hideaki ; Takahashi, Noriaki ; Shidei, Tsunaaki ; Takeshita, Koji ; Kumagai, Yutaka
Author_Institution :
Div. of Integrated Designing, OKI Electr. Ind. Co. Ltd., Tokyo, Japan
Abstract :
A CAM macro for 622 Mbps ATM cell processing has been developed with two built-in circuits, the idle word detection circuit and the multiple hit detection circuit. The macro is fabricated in a standard 0.5 μm 3 layer CMOS technology, 40 MHz operation and 70 mW power dissipation with 3.3 V power supply has been confirmed
Keywords :
CMOS memory circuits; asynchronous transfer mode; cellular arrays; content-addressable storage; integrated circuit design; memory architecture; 0.5 micron; 3.3 V; 40 MHz; 622 Mbit/s; 70 mW; ATM cell processing; CAM macro; built-in circuits; idle word detection circuit; multiple hit detection circuit; power dissipation; power supply; three layer CMOS technology; Asynchronous transfer mode; CADCAM; CMOS technology; Central Processing Unit; Circuits; Computer aided manufacturing; Random access memory; Read-write memory; Research and development; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-3117-6
DOI :
10.1109/CICC.1996.510504
