• DocumentCode
    2213784
  • Title

    Adaptive FPGA placement by natural optimisation

  • Author

    De Vicente, Juan ; Lanchares, Juan ; Hermida, Roman

  • Author_Institution
    ETSIAN, Madrid, Spain
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    188
  • Lastpage
    193
  • Abstract
    Placement is an NP-complete problem, thus probabilistic algorithms are usually applied to its resolution. Simulated annealing (SA) is one of the most successful methods available to treat placement problems. In spite of the wide field of application of SA, experimentation with new cost functions requires costly studies for fine-tuning the algorithm parameters. In this paper, we present natural optimisation (NO), a new self-tuning combinatorial optimisation method. We suggest a slight variation on the SA method to convert it from a user-adaptive method into a self-adaptive one. The initial temperature is automatically determined, and its cooling is adjusted in a natural way to its fair value during the whole annealing process. We have compared the NO algorithm with a fine-tuned SA-based placement tool. As a result, NO appears to be a very promising combinatorial optimisation method, since it simplifies the hard task of parameter adjustment while maintaining the high-quality results provided by SA
  • Keywords
    circuit layout CAD; circuit optimisation; combinatorial mathematics; computational complexity; field programmable gate arrays; self-adjusting systems; simulated annealing; NP-complete problem; adaptive FPGA placement; algorithm parameter fine-tuning; automatically determined initial temperature; cooling; cost functions; natural optimisation; parameter adjustment; probabilistic algorithms; self-adaptive method; self-tuning combinatorial optimisation method; simulated annealing; Annealing; Circuit synthesis; Cooling; Cost function; Design automation; Digital systems; Field programmable gate arrays; Optimization methods; Read only memory; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Rapid System Prototyping, 2000. RSP 2000. Proceedings. 11th International Workshop on
  • Conference_Location
    Paris
  • ISSN
    1074-6005
  • Print_ISBN
    0-7695-0668-2
  • Type

    conf

  • DOI
    10.1109/IWRSP.2000.855223
  • Filename
    855223