DocumentCode
2214185
Title
Calculation of power-supply-induced jitter at a 3-D IC channel including ESD protection circuits
Author
Park, Eunkyeong ; Kim, Jingook ; Lee, Jongjoo ; Park, Youngwoo
Author_Institution
School of ECE, Ulsan National Institute of Science and Technology, South Korea
fYear
2015
fDate
16-22 Aug. 2015
Firstpage
1310
Lastpage
1314
Abstract
The step response of a single ended output driver with silicon interposer channel is derived including the parasitics of ESD protection circuits. The probability density functions of the output voltage due to supply voltage fluctuations are also analytically calculated. With changing the frequency of supply voltage fluctuations, the effect of ESD parasitics on the output jitter is calculated and compared.
Keywords
Electrostatic discharges; Fluctuations; Integrated circuits; Jitter; Parasitic capacitance; Transfer functions; Voltage fluctuations; 3-D IC; Electrostatic discharge (ESD) protection circuit; power supply induced jitter (PSIJ); probability density function (PDF); supply voltage fluctuation; transfer function;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2015 IEEE International Symposium on
Conference_Location
Dresden, Germany
Print_ISBN
978-1-4799-6615-8
Type
conf
DOI
10.1109/ISEMC.2015.7256360
Filename
7256360
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