Evolution of bond technology to hybridized process flows

Author

Farrens, Shari

Author_Institution

Wafer Bonder Div., Waterbury Center, Waterbury, VT, USA

fYear

2009

fDate

28-30 Sept. 2009

Firstpage

1

Lastpage

4

Abstract

Wafer level bonding has emerged from the MEMS industry as a major enabling technology for 3D IC integration. The transition from a low volume MEMS manufacturing environment with many customized processes to a highly standardized, high volume CMOS based manufacturing process flow has forever changed wafer level bonding. Equipment and hardware changes are necessary to meet throughput expectations and reliability standards that far exceed those of low volume manufacturing. In addition, wafer bonding technology has evolved to secure submicron alignment precision with process techniques that are compatible with the cleanliness and contamination requirements of the IC industry.

Keywords

CMOS integrated circuits; integrated circuit manufacture; integrated circuit reliability; surface cleaning; surface contamination; wafer bonding; 3D IC integration; IC industry; cleanliness requirement; contamination requirements; high volume CMOS based manufacturing; hybridized process flow; reliability standards; secure submicron alignment precision; wafer level bonding; CMOS process; CMOS technology; Contamination; Hardware; Manufacturing industries; Manufacturing processes; Micromechanical devices; Three-dimensional integrated circuits; Throughput; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

3D System Integration, 2009. 3DIC 2009. IEEE International Conference on

Conference_Location

San Francisco, CA

Print_ISBN

978-1-4244-4511-0

Electronic_ISBN

978-1-4244-4512-7

Type

conf

DOI

10.1109/3DIC.2009.5306576

Filename

5306576