DocumentCode :
2214313
Title :
Non-orthogonal decoding: An architectural element for reprogrammable interconnect or logic
Author :
Srinivasan, Adi
Author_Institution :
Aptix Corp., San Jose, CA, USA
fYear :
1996
fDate :
5-8 May 1996
Firstpage :
156
Lastpage :
159
Abstract :
A reprogrammable logic or interconnect architecture termed non-orthogonal decoding is described, which increases routability with no additional circuitry and negligible added layout area, compared to an existing reprogrammable routing architecture, the orthogonal decoding architecture introduced by Aptix. An orthogonal decoding architecture´s routing channel box is modified to illustrate non-orthogonal decoding. The former is shown to be replaceable, without restrictions, by non-orthogonal decoding, which is also shown to increase routability. A generalization of the 2-d decoding space to higher dimensions and the application of non-orthogonal decoding to FPGAs are discussed
Keywords :
decoding; field programmable gate arrays; network routing; programmable logic devices; FPGA; circuit layout; nonorthogonal decoding architecture; reprogrammable interconnect; reprogrammable logic; routability; Bidirectional control; Decoding; Field programmable gate arrays; Integrated circuit interconnections; Logic circuits; Random access memory; Routing; Size control; Switches; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-3117-6
Type :
conf
DOI :
10.1109/CICC.1996.510533
Filename :
510533
Link To Document :
بازگشت