• DocumentCode
    2214732
  • Title

    Automatic test pattern generation for functional RTL circuits using assignment decision diagrams

  • Author

    Ghosh, Indradeep ; Fujita, Masahiro

  • Author_Institution
    Fujitsu Laboratories of America
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    43
  • Lastpage
    48
  • Keywords
    Algorithm design and analysis; Automatic test pattern generation; Circuit faults; Circuit synthesis; Circuit testing; Logic circuits; Logic testing; Sequential analysis; Sequential circuits; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2000. Proceedings 2000
  • Print_ISBN
    1-58113-187-9
  • Type

    conf

  • DOI
    10.1109/DAC.2000.855274
  • Filename
    855274
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2214732