DocumentCode :
2214767
Title :
High Density Asynchronous LUT Based on Non-volatile MRAM Technology
Author :
Chaudhuri, Sumanta ; Zhao, Weisheng ; Klein, Jacques-Oliver ; Chappert, Claude ; Mazoyer, Pascale
Author_Institution :
IEF, Univ. Paris-Sud, Orsay, France
fYear :
2010
fDate :
Aug. 31 2010-Sept. 2 2010
Firstpage :
374
Lastpage :
379
Abstract :
In this article, we present the architecture design of high-performance Asynchronous Look Up Table (LUT) embedded with a non-volatile Magnetic RAM (MRAM) as the configuration memory, called MALUT. It promises a number of advantages over the traditional FPGA circuits such as “free” standby power, high operating frequency and instant on/off etc. Thanks to the 3D integration and high density of MRAM, fine-grain run-time reconfiguration and multi-context configuration can be achieved. An automatic design flow has been developed for the design of complex hybrid CMOS/MRAM circuits. Based on CMOS 130nm and MRAM 120nm technology, mixed simulations and layout implementation have been done to demonstrate the expected operation and configuration performances. At last, we discuss and conclude.
Keywords :
CMOS memory circuits; MRAM devices; asynchronous circuits; field programmable gate arrays; low-power electronics; random-access storage; table lookup; CMOS MRAM circuits; FPGA; asynchronous lookup table; fine grain runtime reconfiguration; multicontext configuration; nonvolatile magnetic RAM; FPGA; LUT; MRAM; asynchronous; low power and high speed; non-volatile;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2010 International Conference on
Conference_Location :
Milano
ISSN :
1946-1488
Print_ISBN :
978-1-4244-7842-2
Type :
conf
DOI :
10.1109/FPL.2010.80
Filename :
5694280
Link To Document :
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