Title :
High-speed/high-band width design methodologies for on chip DRAM core multimedia system LSIs
Author :
Tsuruda, Takahiro ; Kobayashi, Mako ; Tsukude, Masaki ; Yamagata, Tadato ; Arimoto, Kazutami
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Tokyo, Japan
Abstract :
Recently, as multimedia LSIs have developed, the demand for high-speed/high-band width LSIs which integrate the DRAM core and logic elements (CPU etc.) have been strongly required. However, the high-speed/high-band width operation induces the large switching noise. This noise degrades a DRAMs operating margin, and especially the data retention characteristics. In this paper, we analyze the noise transmission model and propose a DRAM and logic compatible design methodology to maintain the reliability of high-speed/high-band width system LSIs. Good experimental results are obtained on the test device
Keywords :
CMOS digital integrated circuits; DRAM chips; digital signal processing chips; integrated circuit design; integrated circuit modelling; integrated circuit noise; large scale integration; logic design; multimedia systems; CMOS DSP chips; data retention characteristics; dynamic RAM; high-bandwidth design methodologies; high-speed design methodologies; logic elements; multimedia system LSIs; noise transmission model; onchip DRAM core; reliability; switching noise; Degradation; Design methodology; Large scale integration; Leakage current; Logic devices; Multimedia systems; Noise level; Random access memory; Subthreshold current; System-on-a-chip;
Conference_Titel :
Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-3117-6
DOI :
10.1109/CICC.1996.510556
