Title :
Avalanche multiplication in a compact bipolar transistor model for circuit simulation
Author :
Kloosterman, W.J. ; de Graaff, H.C.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Abstract :
Weak avalanche in bipolar transistors can be accurately modeled by using the collector depletion capacitance. This model has the advantages of a relatively fast numerical evaluation and an easily extracted avalanche parameter. The model incorporates internal voltage drop and temperature dependence and can be implemented in any compact bipolar transistor model
Keywords :
bipolar transistors; impact ionisation; semiconductor device models; avalanche multiplication; circuit simulation; collector depletion capacitance; compact bipolar transistor model; internal voltage drop; numerical evaluation; temperature dependence; weak avalanche; Bipolar transistor circuits; Bipolar transistors; Capacitance; Circuit simulation; Equations; Integrated circuit modeling; Laboratories; Predictive models; Semiconductor process modeling; Voltage;
Conference_Titel :
Bipolar Circuits and Technology Meeting, 1988., Proceedings of the 1988
Conference_Location :
Minneapolis, MN
DOI :
10.1109/BIPOL.1988.51056
