DocumentCode
2215119
Title
An EEPROM compact circuit model
Author
Klein, P. ; Hoffmann, K. ; Kowarik, O.
Author_Institution
Inst. of Electron., Univ. of Bundeswehr Munich, Neubiberg, Germany
fYear
1996
fDate
5-8 May 1996
Firstpage
325
Lastpage
328
Abstract
The model allows the simulation of threshold voltage and drain current shifts as well as FN-tunnel and substrate currents caused by FN and band-to-band tunneling. This is achieved by determining the floating gate charge and voltage as function of time and short channel and geometry effects during programming, erasing and reading
Keywords
EPROM; PLD programming; integrated circuit modelling; tunnelling; EEPROM; FN-tunnel currents; band-to-band tunneling; compact circuit model; drain current shifts; erasing; floating gate charge; geometry effects; programming; reading; short channel effects; substrate currents; threshold voltage; Capacitance; Circuit simulation; Current density; EPROM; Equations; Functional programming; Geometry; Semiconductor process modeling; Threshold voltage; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996
Conference_Location
San Diego, CA
Print_ISBN
0-7803-3117-6
Type
conf
DOI
10.1109/CICC.1996.510568
Filename
510568
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