Title :
Impact of interconnect variations on the clock skew of a gigahertz microprocessort
Author :
Liu, Ying ; Nassif, Sani R. ; Pileggi, Lawrence T. ; Strojwas, Andrzej J.
Author_Institution :
Carnegie Mellon University
Keywords :
CMOS technology; Capacitance; Clocks; Delay estimation; Integrated circuit interconnections; Manufacturing; Microprocessors; Permission; Timing; Wires;
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
DOI :
10.1109/DAC.2000.855297
