Title :
Formal verification of an IBM coreconnect processor local bus arbiter care
Author :
Goel, Amit ; Lee, William R.
Author_Institution :
Department of Electrical and Computer Engineering
Keywords :
Computer architecture; Computer bugs; Formal specifications; Formal verification; Intellectual property; Logic; Permission; Protocols; Silicon; System-on-a-chip;
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
DOI :
10.1109/DAC.2000.855303