Planarized self-aligned double-polysilicon bipolar technology

Author

Drobny, V.F. ; Hacherl, C. ; Dotarrar, S. ; Yamaguchi, T. ; Tang, A. ; Yu, Y. C S

Author_Institution

Tektronix Inc., Beaverton, OR, USA

fYear

1988

fDate

12-13 Sep 1988

Firstpage

115

Lastpage

116

Abstract

The combination of self-aligned double-polysilicon bipolar technology with the trench isolation technique and planarized field oxide and polysilicon regions results in a high-performance bipolar VLSI process, planarized at all mask levels. The planarization approach simplifies photolithography. It also eliminates deformation and discontinuities of polysilicon lines over severe topography and problems with polysilicon residue after RIE steps. A SWAMI process is used to define and isolate both polysilicon layers

Keywords

VLSI; bipolar integrated circuits; integrated circuit technology; photolithography; sputter etching; RIE steps; SWAMI process; Si; bipolar VLSI process; mask levels; photolithography; planarized field oxide; polysilicon lines; self-aligned double-polysilicon bipolar technology; trench isolation technique; Boron; Implants; Isolation technology; Metallization; Oxidation; Process design; Resistors; Schottky diodes; Surface topography; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar Circuits and Technology Meeting, 1988., Proceedings of the 1988

Conference_Location

Minneapolis, MN

Type

conf

DOI

10.1109/BIPOL.1988.51059

Filename

51059

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2215650