A CMOS 12-bit 4 MHz pipelined A/D converter with commutative feedback capacitor

Author

Yang, Jungwook ; Lee, Hae-Seung

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA

fYear

1996

fDate

5-8 May 1996

Firstpage

427

Lastpage

430

Abstract

A 2-bit/stage CMOS 12-bit 4 MHz pipelined A/D converter (ADC) using commutated feedback capacitor switching scheme is presented. The technique improves the DNL without using complicated calibration circuitry, nor requiring extra calibration cycle. Approximately, only 7-bit matched capacitors are required for 12-bit ADC´s. Very high output swing is achieved in a gain enhanced folded cascode amplifier by operating output stage transistors in the triode region. This 12-bit pipelined ADC is integrated in a standard 0.8 μm single poly, triple metal CMOS process, and dissipates 45 mW

Keywords

CMOS integrated circuits; analogue-digital conversion; circuit feedback; pipeline processing; 0.8 micron; 12 bit; 4 MHz; 45 mW; CMOS ADC; commutative feedback capacitor; feedback capacitor switching scheme; gain enhanced folded cascode amplifier; pipelined A/D converter; single poly triple metal CMOS process; CMOS technology; Calibration; Capacitance; Capacitors; Circuits; Computer science; Error correction; Output feedback; Sampling methods; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996

Conference_Location

San Diego, CA

Print_ISBN

0-7803-3117-6

Type

conf

DOI

10.1109/CICC.1996.510590

Filename

510590