DocumentCode
2215701
Title
A high yield 12-bit 250-MS/s CMOS D/A converter
Author
Bastos, Jose ; Steyaert, Michiel ; Sansen, Willy
Author_Institution
ESAT, Katholieke Univ., Leuven, Belgium
fYear
1996
fDate
5-8 May 1996
Firstpage
431
Lastpage
434
Abstract
A 12-bit linearity binary-weighted all MOS transistor D/A converter is presented. Experimental results demonstrate the feasibility of fabricating with high yield such a converter in a standard CMOS 0.7 μm technology. The output drives a doubly terminated 50 Ω coaxial cable. The full scale 10-90% rise/fall time is 4 ns. The active chip area is 1 mm2
Keywords
CMOS integrated circuits; digital-analogue conversion; 0.7 micron; 12 bit; 4 ns; CMOS D/A converter; MOS transistor DAC; linearity binary-weighted type; standard CMOS technology; CMOS technology; Coaxial cables; Digital signal processing chips; Linearity; MOSFETs; Switches; Video signal processing; Voltage; Wireless communication; Yield estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996
Conference_Location
San Diego, CA
Print_ISBN
0-7803-3117-6
Type
conf
DOI
10.1109/CICC.1996.510591
Filename
510591
Link To Document