Title :
Symbolic timing simulation using cluster scheduling
Author :
McDonald, Clayton B. ; Bryant, Randal E.
Author_Institution :
Carnegie Mellon University
Keywords :
Boolean functions; Circuit simulation; Computational modeling; Data structures; Delay; Logic testing; Permission; Processor scheduling; Sociotechnical systems; Timing;
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
DOI :
10.1109/DAC.2000.855314