Poly emitter bipolar transistor optimization for an advanced BiCMOS technology

Author

Landau, B. ; Bastani, B. ; Haueisen, D. ; Lahri, R. ; Joshi, S. ; Small, J.

Author_Institution

Nat. Semicond. Corp., Puyallup, WA, USA

fYear

1988

fDate

12-13 Sep 1988

Firstpage

117

Lastpage

120

Abstract

Two approaches involving phosphorus- and arsenic-doped poly emitters for bipolar device optimization in a 1 μm BiCMOS process are reported. An evaluation includes a comparison of process and device parameters for the two emitter types in the context of a junction-isolated process. The impact of device optimization as measured by ECL and BiCMOS ring oscillators and a BiCMOS 256 K SRAM is discussed. Finally, the reliability of phosphorus and arsenic poly emitters, in terms of beta degradation due to reverse biasing of the emitter-base junction, is presented

Keywords

BIMOS integrated circuits; bipolar transistors; elemental semiconductors; emitter-coupled logic; integrated circuit technology; random-access storage; silicon; 1 micron; 256 kbit; ECL; SRAM; Si:As; Si:P; beta degradation; bipolar transistor; device optimization; emitter-base junction; junction-isolated process; polysilicon emitter; reliability; reverse biasing; ring oscillators; BiCMOS integrated circuits; Bipolar transistors; Boron; CMOS process; Contact resistance; Degradation; Implants; Process design; Random access memory; Ring oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar Circuits and Technology Meeting, 1988., Proceedings of the 1988

Conference_Location

Minneapolis, MN

Type

conf

DOI

10.1109/BIPOL.1988.51060

Filename

51060