DocumentCode
2215994
Title
Power minimization derived from architectural-usage of VLIW processors
Author
Gebotys, C. ; Gebotys, R. ; Wiratunga, S.
Author_Institution
University of Waterloo
fYear
2000
fDate
2000
Firstpage
308
Lastpage
311
Keywords
Costs; Digital signal processing; Embedded software; Embedded system; Equations; Permission; Power dissipation; Power generation; Power measurement; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN
1-58113-187-9
Type
conf
DOI
10.1109/DAC.2000.855326
Filename
855326
Link To Document