Low-pressure, low-temperature hydrogen annealing for nanoscale silicon fin rounding

In the CMOS technology, silicon rounding technique is often an essential part of fabrication. There have been some studies about hydrogen annealing process in a silicon fin. But the previous studies have been done in relatively large silicon fins (200 nm ~ 1 mum). In this study, effect of hydrogen annealing in a nanoscale fin (30 nm ~ 100 nm) is investigated. There is significant difference between large width fin and small width fin. Especially, in the smaller fin, not only silicon self-diffusion but also silicon etch phenomenon become important.