"Timing closure by design," a high frequency microprocessor design methodology

Author

Posluszny, S. ; Aoki, N. ; Boerstler, D. ; Coulman, P. ; Dhong, S. ; Flachs, B. ; Hofstee, P. ; Kojima, N. ; Kwon, O. ; Lee, K. ; Meltzer, D. ; Nowka, K. ; Park, J. ; Peter, I. ; Silberman, J. ; Takahashi, O. ; Villarrubia, P.

Author_Institution

IBM Austin Research Lab

fYear

2000

fDate

2000

Firstpage

712

Lastpage

717

Keywords

Circuits; Clocks; Delay; Design automation; Design methodology; Frequency; Logic design; Microprocessors; Programmable logic arrays; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2000. Proceedings 2000

Print_ISBN

1-58113-187-9

Type

DOI

10.1109/DAC.2000.855407

Filename

855407

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