DocumentCode :
2217741
Title :
Unifying behavioral synthesis and physical design
Author :
Dougherty, William E. ; Thomas, Donald E.
Author_Institution :
Carnegie Mellon University
fYear :
2000
fDate :
2000
Firstpage :
756
Lastpage :
761
Keywords :
Costs; Delay estimation; Design automation; History; Integrated circuit interconnections; Integrated circuit synthesis; Minimization; Permission; Processor scheduling; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
Type :
conf
DOI :
10.1109/DAC.2000.855415
Filename :
855415
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2217741
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