Title :
A theoretically optimal and practically fast algorithm for VLSI geometrical design rule verification
Author :
Sato, Masao ; Kim, Jung Bud ; Awashima, Toru ; Ohtsuki, Tatsuo
Author_Institution :
Dept. of Inf. Eng., Takushoku Univ., Tokyo, Japan
Abstract :
An optimal algorithm for the minimum space/width checking problem is presented. This algorithm searches the plane in both directions without sorting input data in both directions, keeps the theoretically optimal time and space complexity, and runs fast. It runs in O(n log n) time with O(n/sup 0.5/) main memory space, where n is the number of vertices of the patterns. Although the authors deal only with rectilinear regions as input data, it is easy to extend the algorithm to handle regions with diagonal edges.<>
Keywords :
VLSI; circuit layout CAD; VLSI geometrical design rule verification; diagonal edges; fast algorithm; input data; main memory space; minimum space/width checking problem; optimal algorithm; rectilinear regions; vertices; Algorithm design and analysis; Data engineering; Design engineering; Euclidean distance; Silicon; Space technology; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo, Finland
DOI :
10.1109/ISCAS.1988.15201
