DocumentCode
2218779
Title
Characterization of barrier and seed layer integrity for copper interconnects
Author
Wojcik, Henry ; Lehninger, David ; Neumann, Volker ; Bartha, Johann W.
Author_Institution
Inst. for Semicond. & Microsyst. Technol., Tech. Univ. of Dresden, Dresden, Germany
fYear
2011
fDate
27-28 Sept. 2011
Firstpage
1
Lastpage
5
Abstract
A matrix of characterization techniques is presented, aiming at a thorough investigation of novel barrier / seed films with respect to their applicability in Cu damascene interconnects. The paper primarily focuses on the reliable testing of the Cu diffusion barrier performance using bias temperature stress (BTS) and triangular voltage sweep (TVS), as well as on the testing of Cu-wetting with regard to electromigration (EM), and on direct Cu plating. Typical test procedures are described. A good adhesion to low-k dielectrics, a good oxygen diffusion barrier performance and chemical mechanical polishing (CMP) capability are identified as further important criteria.
Keywords
chemical mechanical polishing; copper; diffusion barriers; electromigration; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; Cu damascene interconnects; Cu-wetting; barrier-seed films; barrier-seed layer integrity; bias temperature stress; chemical mechanical polishing; electromigration; oxygen diffusion barrier performance; reliable testing; triangular voltage sweep; Adhesives; Annealing; Copper; Electric fields; Films; Ions; Cu dewtting; Cu diffusion barriers; Cu plating; bias temperature stress; cobalt; ruthenium; triangular voltage sweep;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Conference Dresden (SCD), 2011
Conference_Location
Dresden
Print_ISBN
978-1-4577-0431-4
Type
conf
DOI
10.1109/SCD.2011.6068735
Filename
6068735
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