Perimeter effect in advanced self-aligned bipolar transistor

Emitter perimeter effects in advanced self-aligned bipolar transistors utilizing a sidewall spacer technology have been studied. Collector-emitter punchthrough, emitter current crowding and base resistance increment due to insufficient extrinsic-intrinsic base overlap in the emitter periphery, and the lowering of cutoff frequency and the tunneling current due to the lateral encroachment of the extrinsic-base into the intrinsic-base area are discussed. Particular emphasis is placed on the dependence of the degree of the extrinsic-intrinsic base overlap on the sidewall spacer length and the extrinsic-base profile. The balance between increasing the base resistance increment and decreasing the cutoff frequency is a device design tradeoff, as is the balance between the perimeter punchthrough current and the perimeter tunneling current