DocumentCode
2218948
Title
Proceedings of 14th VLSI Test Symposium
fYear
1996
fDate
April 28 1996-May 1 1996
Abstract
The following topics were dealt with: design for testability; analog circuit testability; synthesis for testability; IDDQ testing; on-line testing; fault diagnosis and fault dictionaries; sequential circuit testing; multichip modules and memory testing; delay fault testing; nontraditional testing; built-in self-test; fault modeling and defect coverage; fault simulation and test generation; mixed-signal test techniques
Keywords
VLSI; analogue integrated circuits; automatic testing; built-in self test; design for testability; fault diagnosis; integrated circuit testing; integrated memory circuits; logic testing; mixed analogue-digital integrated circuits; multichip modules; IDDQ testing; VLSI test; analog circuit testability; built-in self-test; defect coverage; delay fault testing; design for testability; fault diagnosis; fault dictionaries; fault modeling; fault simulation; memory testing; mixed-signal test techniques; multichip modules; nontraditional testing; online testing; sequential circuit testing; synthesis for testability; test generation;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1996., Proceedings of 14th
Conference_Location
Princeton, NJ, USA
ISSN
1093-0167
Print_ISBN
0-8186-7304-4
Type
conf
DOI
10.1109/VTEST.1996.510825
Filename
510825
Link To Document