DocumentCode :
2219266
Title :
A new digital test approach for analog-to-digital converter testing
Author :
Ehsanian, Mehiw ; Kaminska, Bozena ; Arabi, Karim
Author_Institution :
Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
fYear :
1996
fDate :
28 Apr-1 May 1996
Firstpage :
60
Lastpage :
65
Abstract :
A fully digital built-in self-test (BIST) for analog-to-digital converters is presented in this paper. This test circuit is capable of measuring the DNL, INL, offset error and gain error, and mainly consists of several registers and some digital subtracters. The main advantage of this BIST is the ability to test DNL and INL for all codes in the digital domain, which in turn eliminate the necessity of calibration. On the other hand, some parts of the analog-to-digital converter with minor modifications are used in the BIST simultaneously. This also reduces the area overhead and the cost of the test. The proposed BIST structure presents a compromise between test accuracy, area overhead and test cost. The BIST circuitry has been designed using CMOS 1.5 μm technology. The simulation results of the test show that it can be applied to medium resolution analog-to-digital converter or high resolution pipelined analog-to-digital converter. The presented BIST shows satisfactory results for 9-bit pipelined analog-to-digital converter
Keywords :
CMOS integrated circuits; VLSI; analogue-digital conversion; built-in self test; integrated circuit testing; 1.5 micron; A/D converter testing; BIST circuitry; CMOS technology; DNL; INL; analog/digital converter testing; area overhead reduction; built-in self-test; differential nonlinearity; digital test approach; gain error; high resolution pipelined ADC; integral nonlinearity; medium resolution ADC; offset error; Analog-digital conversion; Automatic testing; Built-in self-test; Circuit testing; Computer errors; Costs; Digital circuits; Integrated circuit testing; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1996., Proceedings of 14th
Conference_Location :
Princeton, NJ
ISSN :
1093-0167
Print_ISBN :
0-8186-7304-4
Type :
conf
DOI :
10.1109/VTEST.1996.510836
Filename :
510836
Link To Document :
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