DocumentCode
2219279
Title
Iterative test-point selection for analog circuits
Author
van Spaandonk, J. ; Kevenaar, T.A.M.
Author_Institution
Eindhoven Univ. of Technol., Netherlands
fYear
1996
fDate
28 Apr-1 May 1996
Firstpage
66
Lastpage
71
Abstract
A method is presented which is useful for functional testing of analog circuits. It selects a set of rest points from a large set of candidate test points by combining a well-known decomposition technique from linear algebra with an iterative algorithm. The influence of random measurement errors is taken into account. Examples demonstrate that the method allows the circuit behavior to be determined with high precision, even in the presence of large measurement errors
Keywords
VLSI; analogue integrated circuits; integrated circuit testing; iterative methods; measurement errors; analog ICs; decomposition technique; functional testing; iterative algorithm; iterative test-point selection; random measurement errors; Analog circuits; Bandwidth; Capacitors; Circuit testing; Cost function; Current measurement; Iterative algorithms; Linear algebra; Measurement errors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1996., Proceedings of 14th
Conference_Location
Princeton, NJ
ISSN
1093-0167
Print_ISBN
0-8186-7304-4
Type
conf
DOI
10.1109/VTEST.1996.510837
Filename
510837
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