A digital trimmable comparator for high precision ADCs in wireless sensor nodes

A new concept of a digital trimmable comparator for high precision analog-to-digital converters is presented. The rail-to-rail comparator structure leads to a higher resolution of the ADC compared to other comparator concepts due to its innovative mismatch cancellation. Conventional comparators have a discrepancy between the simulated resolution and the extracted or produced structure. Due to the presented bit-programmable trimming mechanism the mismatch problem can be significantly reduced. The new structure consisting of a comparator and a bit programmable delay is shown. This building block is suitable for low-power, high-precision ADCs with an LSB (Least significant bit) of only some hundred microvolts, which are frequently used in the receiving path of high performance wireless sensor nodes.