• DocumentCode
    2220097
  • Title

    A new test pattern generation method for delay fault testing

  • Author

    Cremoux, S. ; Fagot, C. ; Girard, P. ; Landrault, C. ; Pravossoudovitch, S.

  • Author_Institution
    Lab. d´´Inf. de Robotique et de Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
  • fYear
    1996
  • fDate
    28 Apr-1 May 1996
  • Firstpage
    296
  • Lastpage
    301
  • Abstract
    Importance of delay testing is growing especially for high speed circuits. As delay testing using automatic test equipment is expensive, built-in self-test is an alternative technique that can significantly reduce the cost of delay testing. In this paper a new test pattern generation method for the detection of delay faults is proposed. It can be seen as a directed random generation technique, and uses some original concepts from machine learning to generate delay fault detecting test pairs. First, a set of random test vectors is generated. Next, a learning tool working on those vectors provides relevant features of delay fault detecting test pairs. Finally, a set of new test vectors that are consistent with those features is generated. A comparison with other test generation techniques has been done on several circuits, and has shown the efficiency of our solution in terms of test sequence length and delay fault coverage
  • Keywords
    VLSI; automatic testing; built-in self test; delays; digital integrated circuits; integrated circuit testing; learning (artificial intelligence); logic testing; BIST; delay fault coverage; delay fault testing; directed random generation technique; high speed circuits; learning tool; random test vectors; test pattern generation method; test sequence length; Automatic test equipment; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Delay; Electrical fault detection; Fault detection; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 1996., Proceedings of 14th
  • Conference_Location
    Princeton, NJ
  • ISSN
    1093-0167
  • Print_ISBN
    0-8186-7304-4
  • Type

    conf

  • DOI
    10.1109/VTEST.1996.510871
  • Filename
    510871