DocumentCode :
2220584
Title :
Design of resonant global clock distributions
Author :
Chan, Steven C. ; Shepard, Kenneth L. ; Restle, Phillip J.
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
fYear :
2003
fDate :
13-15 Oct. 2003
Firstpage :
248
Lastpage :
253
Abstract :
We present a new approach to global clock distribution in which traditional tree-driven grids are augmented with on-chip inductors to resonate the clock capacitance at the fundamental frequency of the clock node. Rather than being dissipated as heat, the energy of the fundamental resonates between electric and magnetic forms. The clock drivers must only provide the energy necessary to overcome losses. As a result, power reduction of over 80% is possible depending on the Q of the resonant system. Clock latency is also improved because the effective capacitance of the grid is lower, and fewer buffer stages are necessary to drive the grid. Skew and jitter reductions come about because of this reduced buffer latency.
Keywords :
Q-factor; synchronisation; system-on-chip; timing jitter; transfer functions; transient response; Q-factor; buffer latency; clock capacitance; clock driver; clock latency; global clock distribution; jitter reduction; on-chip inductors; resonant system; skew reduction; Capacitance; Clocks; Delay effects; Drives; Frequency; Inductors; Jitter; Magnetic resonance; Wire; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design, 2003. Proceedings. 21st International Conference on
ISSN :
1063-6404
Print_ISBN :
0-7695-2025-1
Type :
conf
DOI :
10.1109/ICCD.2003.1240902
Filename :
1240902
Link To Document :
بازگشت