DocumentCode :
2220801
Title :
Dynamic thread resizing for speculative multithreaded processors
Author :
Zahran, Mohamed ; Franklin, Manoj
Author_Institution :
Dept. of Electr. & Comput. Eng., Maryland Univ., College Park, MD, USA
fYear :
2003
fDate :
13-15 Oct. 2003
Firstpage :
313
Lastpage :
318
Abstract :
There is a growing interest in the use of speculative multithreading to speed up the execution of a program. In speculative multithreading model, threads are extracted from a sequential program and are speculatively executed in parallel, without violating sequential program semantics. In order to get the best performance from this model, a highly accurate thread selection scheme is needed in order to accurately assign threads to processing elements (PEs) for parallel execution. This is done using a thread predictor that assigns threads to PEs sequentially. However, this in-order thread assignment has severe limitations. One of the limitations is when the thread predictor is unable to predict the successor of a particular thread. This may cause successor PEs to remain idle for many cycles. Another limitation has to do with control independence. When a misprediction occurs, all threads, starting from the misprediction point, get squashed, although many of them may be control independent of the misprediction. We present a hierarchical technique for building threads, as well as a nonsequential scheme of assigning them to PEs, and a selective approach to squash threads in case of misprediction, in order to take advantage of control independences. This technique uses dynamic resizing, and builds threads in two steps, statically using the compiler as well as dynamically at run-time. Based on the dynamic behavior of the program, a thread can dynamically expand or shrink in size, and can span several PEs. Detailed simulation results show that our dynamic resizing based approach results in a 11.6% average increase in speedup relative to a conventional speculative multithreaded processor.
Keywords :
multi-threading; parallel architectures; program compilers; dynamic thread resizing; in-order thread assignment; parallel program execution; processing elements; program compiler; sequential program semantics; speculative multithreaded processor; thread predictor; thread selection scheme; Educational institutions; Hardware; Multithreading; Parallel processing; Program processors; Runtime; Scalability; Transistors; VLIW; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design, 2003. Proceedings. 21st International Conference on
ISSN :
1063-6404
Print_ISBN :
0-7695-2025-1
Type :
conf
DOI :
10.1109/ICCD.2003.1240912
Filename :
1240912
Link To Document :
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