DocumentCode :
2221113
Title :
Virtual page tag reduction for low-power TLBs
Author :
Petrov, Peter ; Orailoglu, Alex
Author_Institution :
Dept. of Comput. Sci., California Univ., San Diego, CA, USA
fYear :
2003
fDate :
13-15 Oct. 2003
Firstpage :
371
Lastpage :
374
Abstract :
We present a methodology for a power-optimized, software-controlled translation lookaside buffer (TLB) organization. A highly reduced number of virtual page number (VPN) bits sufficient to perform physical address translation is efficiently identified and used when performing TLB lookups, delivering significant power reductions. Information regarding the virtual address space of the program code and data provided by the compiler is augmented with information regarding the dynamically linked libraries and data allocated run-time by the loader, the dynamic linker, and the memory manager. The hardware support needed is constrained to disabling bitlines of the tag arrays associated to the 1-TLB and the D-TLB. Algorithms for identifying the reduced VPNs for power optimized TLB operations together with the required OS support are presented.
Keywords :
buffer storage; operating systems (computers); optimisation; virtual storage; VPN; dynamically linked library; low-power TLB; physical address translation; power reduction; software-controlled TLB organization; tag array; translation lookaside buffer; virtual address space; virtual page number; virtual page tag reduction; Character recognition; Energy consumption; Hardware; Memory management; Operating systems; Program processors; Runtime library; Switches; Technical Activities Guide -TAG; Virtual private networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design, 2003. Proceedings. 21st International Conference on
ISSN :
1063-6404
Print_ISBN :
0-7695-2025-1
Type :
conf
DOI :
10.1109/ICCD.2003.1240921
Filename :
1240921
Link To Document :
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