DocumentCode
2221454
Title
Interleaving quasi-sliding mode control of parallel-connected inverters
Author
Biel, D. ; Fossas, E. ; Guinjoan, F. ; Ramos, R.
Author_Institution
Univ. Politec. de Catalunya (UPC), Barcelona
fYear
2008
fDate
8-10 June 2008
Firstpage
337
Lastpage
342
Abstract
An interleaving fixed switching frequency quasi-sliding control algorithm based on the zero average dynamics (ZAD) approach is reported and applied to the design of a modular system of parallel-connected single-phase inverters. This approach is used in a laboratory prototype of three inverters with an FPGA control-based implementation embedding this algorithm. Experimental results are provided to illustrate the design features in terms of AC output voltage regulation, balanced current sharing among mismatched modules, interleaved fixed switching frequency operation and robustness with respect to load variations.
Keywords
field programmable gate arrays; invertors; variable structure systems; AC output voltage regulation; FPGA control; balanced current sharing; interleaved fixed switching frequency operation; parallel-connected inverters; quasi-sliding mode control; zero average dynamics approach; Algorithm design and analysis; Control systems; Field programmable gate arrays; Interleaved codes; Inverters; Laboratories; Prototypes; Robustness; Switching frequency; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Variable Structure Systems, 2008. VSS '08. International Workshop on
Conference_Location
Antalya
Print_ISBN
978-1-4244-2199-2
Electronic_ISBN
978-1-4244-2200-5
Type
conf
DOI
10.1109/VSS.2008.4570731
Filename
4570731
Link To Document