Modulated integral control technique for compensating switch delays and non-ideal DC bus in three phase voltage source inverters

Standard PWM techniques assume a ripple free DC-link voltage at the inverter input terminal and ideal switches. Most techniques proposed in the literature to compensate the nonideal characteristics require additional and complex circuitry. This paper proposes and analyses a simple method of generating PWM switching patterns which ensures high quality output voltage and inherently compensates for nonideal DC bus and switching delays. The method is based on maintaining a sinusoidal volt-sec distribution at the inverter output by sensing the output voltage and generating the gating pattern online. The principles of operation are explained and a design procedure presented. Simulation results illustrating the features of the proposed modulator are verified experimentally on a 3 kVA prototype unit