DocumentCode :
2223555
Title :
Test board for power FET´s nonliner model extraction
Author :
Kapralova, A.A. ; Korchagin, I.P. ; Manchenko, L.V. ; Pashkovskii, A.B. ; Pchelin, V.A. ; Tregubov, V.B.
Author_Institution :
Fed. State Unitary Corp. R&PC Istok, Fryazino, Russia
fYear :
2011
fDate :
12-16 Sept. 2011
Firstpage :
261
Lastpage :
262
Abstract :
The simple correction method is presented for the non-linear models of power FET´s to be adjusted by means of measurements of transistors in a test board. The technique is based on measurement of the same transistor in 50 Ohm line and then in matching networks with known impedance realizing maximum gain factor at the operating point, and in a test circuitry adjusted for the maximum of output capacity.
Keywords :
power field effect transistors; semiconductor device models; semiconductor device testing; matching networks; power FET nonliner model extraction; test board; test circuitry; transistor measurements; Electronic mail; HEMTs; Impedance; MESFETs; Power generation; Power measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave and Telecommunication Technology (CriMiCo), 2011 21th International Crimean Conference
Conference_Location :
Sevastopol
Print_ISBN :
978-1-4577-0883-1
Type :
conf
Filename :
6068924
Link To Document :
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