DocumentCode
2224438
Title
Improving circuit simulation accuracy by partitioning algorithm
Author
Sun, Wei ; Jiang, Yao-Lin ; Chen, Richard M M
Author_Institution
City Univ. of Hong Kong, China
fYear
2001
fDate
2001
Firstpage
136
Lastpage
140
Abstract
In this paper, error models based on partitioning of matrices are derived for solving a sparse linear system of circuit equations. Better agreement between actual computed results and estimated errors is achieved. It is shown that the algorithm proposed here can improve the accuracy of large circuit simulations
Keywords
circuit CAD; circuit simulation; error analysis; logic partitioning; sparse matrices; circuit simulation accuracy; computed results; error models; estimated errors; large circuit simulations; matrix partitioning; partitioning algorithm; sparse linear circuit equations system; sparse matrix; Circuit simulation; Computer errors; Electronic circuits; Equations; Error analysis; Finite wordlength effects; Linear systems; Partitioning algorithms; Sparse matrices; Sun;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982516
Filename
982516
Link To Document