• DocumentCode
    2224620
  • Title

    VLSI/PCB placement with predefined coordinate alignment constraint based on sequence pair

  • Author

    Liu, Rui ; Hong, Xianlong ; Dong, Sheqin ; Cai, Yici ; Gu, Jun

  • Author_Institution
    Inst. of Software, Acad. Sinica, Beijing, China
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    167
  • Lastpage
    170
  • Abstract
    In the system on a chip, some cells should be placed along a predefined coordinate within a relative small region. This constraint comes from the requirement that the data should be ready on the common bus on the same time. In this paper, we study the module placement problem where some modules have the predefined coordinate alignment (PCA) constraint. We give the relations between constrained modules, from which a necessary condition is induced. We develop a polynomial-time algorithm that can guarantee a feasible placement is always obtainable. Our algorithm is implemented and tested on ami33 and ami49. Its effectiveness is supported by the experimental results
  • Keywords
    VLSI; circuit layout CAD; integrated circuit layout; printed circuit layout; PCB placement; VLSI placement; common bus; module placement; polynomial time algorithm; predefined coordinate alignment constraint; sequence pair; system-on-a-chip; Clocks; Computer architecture; Computer science; Delay effects; Polynomials; Principal component analysis; Read only memory; Read-write memory; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2001. Proceedings. 4th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    0-7803-6677-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2001.982523
  • Filename
    982523