VLSI design of a high-speed CMOS image sensor with in-situ 2D programmable processing

A high speed VLSI image sensor including some preprocessing algorithms is described in this paper. The sensor implements some low-level image processing in a massively parallel strategy in each pixel of the sensor. Spatial gradients, various convolutions as Sobel or Laplacian operators are described and implemented on the circuit. Each pixel includes a photodiode, an amplifier, two storage capacitors and an analog arithmetic unit. The systems provides address-event coded outputs on tree asynchronous buses, the first output is dedicated to the result of image processing and the two others to the frame capture at very high speed. Frame rates to 10 000 frames/s with only image acquisition and 1000 to 5000 frames/s with image processing have been demonstrated by simulations.