DocumentCode
2224978
Title
A low-voltage high-speed sampling technique
Author
Xu, Gang ; Yuan, Jiren
Author_Institution
Competence Center for Circuits Design, Lund Univ., Sweden
fYear
2001
fDate
2001
Firstpage
228
Lastpage
231
Abstract
A new sampling technique is proposed, which integrates input current instead of tracking input voltage to realize high speed and low voltage sampling. Both the theoretical deduction and the simulation prove the advantages of improving the speed and accuracy of CMOS sampling circuits. A practical charge sampling circuit with 3 V supply, 500 MS/s and 9-bit accuracy is suggested
Keywords
analogue-digital conversion; high-speed integrated circuits; low-power electronics; signal sampling; 3 V; 9 bit; accuracy; charge sampling circuit; high speed sampling; high-speed sampling technique; input current integration; low voltage sampling; speed; Bandwidth; CMOS analog integrated circuits; Circuit simulation; Circuit synthesis; Clocks; Frequency domain analysis; Low voltage; Sampling methods; Tracking loops; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982539
Filename
982539
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