DocumentCode
2225205
Title
Implementation of an analog self-learning neural network
Author
Lu, Chun ; Shi, Bing-Xue ; Chen, Lu
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear
2001
fDate
2001
Firstpage
262
Lastpage
265
Abstract
An analog self-learning neural network is proposed. A prototype chip has been fabricated using a 1.2-um CMOS, double-polysilicon, double-metal technology. Because of its fully analog and fully parallel structure, the proposed LSI can do continuous time calculation. The result of the XOR experiment shows that the circuit achieves the self-learning
Keywords
CMOS analogue integrated circuits; large scale integration; neural chips; 1.2 micron; CMOS chip; LSI; XOR experiment; analog self-learning neural network; continuous time calculation; double-polysilicon double-metal technology; parallel structure; CMOS process; CMOS technology; Circuits; Large scale integration; Microelectronics; Network-on-a-chip; Neural networks; Neurons; Prototypes; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982548
Filename
982548
Link To Document