Title :
Error-suppressing encoding structure of competition in flash A/D converter
Author :
Yu-hua, Guo ; Zhao-gang, Wang ; Jun-yan, Ren ; Lian, Li
Author_Institution :
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China
Abstract :
A new encoding structure - competition encoder for high speed ADC is presented in the paper. Compared with the conventional encoding structure, competition coding can suppress the error code rate of ADC output greatly. A mathematical model of coding structure is presented here to calculate the error code rate. Finally, the simulation results with Matlab are analyzed and discussed
Keywords :
analogue-digital conversion; error correction codes; Matlab simulation; competition encoder; error code rate; error-suppressing encoding structure; flash A/D converter; high-speed ADC; mathematical model; Analytical models; Application specific integrated circuits; Degradation; Encoding; Hamming distance; Interference; Mathematical model; Metastasis; Read only memory; Voltage;
Conference_Titel :
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6677-8
DOI :
10.1109/ICASIC.2001.982557
