DocumentCode
2226329
Title
A new VLSI design for decoding of Reed-Solomon codes based on ASIP [HDTV]
Author
Yuanxin, Xu ; Fang, Xia ; Qingdong, Yao ; Peiliang, Qiu ; Kuang, Wang
Author_Institution
Dept. of Inf. & Electron. Eng., Zhejiang Univ., Hangzhou, China
fYear
2001
fDate
2001
Firstpage
448
Lastpage
451
Abstract
Reed Solomon (RS) codes providing an efficient capability for correcting burst errors have been widely used. Some work has already been done in developing VLSI decoders for RS codes. This paper proposes a new VLSI design of RS decoder using ASIP based on software ideas. It shortens the design time and enhances the reliability of VLSI. We have successfully used the method for the design of RS decoder (207, 187) in the ATSC-HDTV receiver chip
Keywords
Reed-Solomon codes; VLSI; decoding; error correction codes; high definition television; integrated circuit reliability; television receivers; ASIP; ATSC-HDTV receiver chip; RS decoder (207,187); Reed-Solomon codes; VLSI design; burst errors; decoding; design time; reliability; software idea; Application specific processors; Decoding; Error correction; Error correction codes; HDTV; Hardware; Mobile communication; Polynomials; Reed-Solomon codes; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982597
Filename
982597
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