ILP-based scheme for low power scheduling and resource binding

In this paper, we present an ILP based scheme for high-level synthesis for low power applications. Specifically, we present (i) an ILP-based model for latency constrained scheduling that minimizes the number of resources, the peak power consumption and peak area, and (ii) a LP-based model for resource binding that minimizes the amount of switching at the input of the functional units. The ILP based scheduler is very flexible since it allows the relative importance of the three objectives (number of resources, peak power, peak area) to be determined by user-defined weighting factors. The LP-based method for resource binding consists of creating a multistage graph with m stages (corresponding to m cycles in the schedule) and n nodes per stage (corresponding to n functional units of the same type) and finding n disjoint paths such that the total cost (corresponding to the switching activity) of these paths is minimum