DocumentCode :
2226677
Title :
Design of VXIbus register based interface based on VHDL
Author :
Yuan, Wang ; Wei-jie, Zhang ; Ping, Lu ; Rong, Yang
Author_Institution :
Mech. Eng. Colleges, Shi Jiazhuang, China
fYear :
2001
fDate :
2001
Firstpage :
498
Lastpage :
501
Abstract :
The FPGA based VXI interface design technology is getting more and more mature as more and more VXI bus modular instruments are developed. This paper shows how to implement the VXI register based interface with VHDL. The initialization and self test circuits, device and register addressing circuits, reading and writing registers and data acknowledgement circuits are illustrated in detail. The simulation results combining with VXIbus timing sequence are also partly given
Keywords :
field programmable gate arrays; hardware description languages; logic CAD; peripheral interfaces; timing; FPGA based VXI interface; VHDL based design; VXI interface design; VXIbus modular instruments; VXIbus register based interface; VXIbus timing sequence; addressing circuits; data acknowledgement circuits; initialization circuits; self test circuits; Automatic testing; Circuit simulation; Circuit testing; Design methodology; Electronics packaging; Field programmable gate arrays; Hardware design languages; Instruments; Manufacturing; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6677-8
Type :
conf
DOI :
10.1109/ICASIC.2001.982609
Filename :
982609
Link To Document :
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