MPEG-2 TS generate system and its implementation with FPGA

Author

Guan, Dongliang ; Yu, Songyu ; Liang, Changtai ; Wang, Xingdong

Author_Institution

Inst. of Image Commun. & Inf. Process., Shanghai Jiao Tong Univ., China

fYear

2001

fDate

2001

Firstpage

510

Lastpage

513

Abstract

In this paper, a MPEG-2 TS (transport stream) generation system is introduced. It can work as a TS generator source to provide a TS from hard disk in a cycling mode; it can also work as a TS recorder to receive a TS from a peripheral. A real-time PID filter, PID changing and bit rate changing are also realized in this system; Further the received TS can be analyzed and processed by a PC. In this paper, we briefly introduce the TS generate system´s hardware architecture and working process. The system consists of a PCI interface card and a PC. The PCI interface card is implemented mainly with one FPGA (APEX 20K200 E). The system takes full advantage of the APEX20K´s features of high integrity and flexibility that most functions are realized within one FPGA

Keywords

application specific integrated circuits; code standards; data compression; digital signal processing chips; field programmable gate arrays; signal generators; telecommunication equipment testing; video coding; APEX 20K200E; APEX20K; FPGA implementation; MPEG-2 transport stream generation system; PCI interface card; bit rate variation; hardware architecture; real-time PID filter; Bit rate; Digital TV; Digital video broadcasting; Electronics packaging; Field programmable gate arrays; Filters; Hard disks; Hardware; IEC standards; ISO standards;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2001. Proceedings. 4th International Conference on

Conference_Location

Shanghai

Print_ISBN

0-7803-6677-8

Type

conf

DOI

10.1109/ICASIC.2001.982612

Filename

982612