DocumentCode
2226872
Title
The design of general-purpose parallel interface based on CPLD
Author
Yu, Chengfang ; Yu, Huihua ; Tang, Ting-ao
Author_Institution
Dept of EE, Fudan Univ., Shanghai, China
fYear
2001
fDate
2001
Firstpage
526
Lastpage
529
Abstract
The design of a general-purpose parallel interface based on CPLD is described. As a result, system design can be simplified by using a parallel interface circuit that is composed of CPLDs in an embedded system. Flexibility is another advantage. The module method has been used in the design, so the design procedure becomes simpler and more efficient. It also has reusable performance
Keywords
embedded systems; logic design; peripheral interfaces; programmable logic devices; CPLD; design procedure; embedded system; general-purpose parallel interface; module method; parallel interface circuit; reusable performance; Computer buffers; Decoding; Embedded system; Fabrication; Field programmable gate arrays; Flexible printed circuits; Logic circuits; Logic devices; Logic functions; User interfaces;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982616
Filename
982616
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