• DocumentCode
    2227235
  • Title

    Designing AHB/PCI bridge

  • Author

    Zhonghai, Wang ; Yizheng, Ye ; Jinxiang, Wang ; Mingyan, Yu

  • Author_Institution
    Microelectron. Center, Harbin Inst. of Technol., China
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    578
  • Lastpage
    580
  • Abstract
    The PCI Local Bus is a high performance, 32-bit or 64-bit bus with multiplexed address and data lines. It is intended for use as an interconnect mechanism between highly integrated peripheral controller components, peripheral add-in boards and processor/memory systems. The AHB of AMBA (Advanced Microcontroller Bus Architecture) is also designed for high-performance, high clock frequency system modules. In SoC design, the AHB acts as a high-performance system backbone bus. The function of AHB/PCI bridges is to map various control signals and address spaces from one bus into those of another. This paper presents the design of the AHB/PCI bridge
  • Keywords
    CMOS logic circuits; bridge circuits; integrated circuit design; peripheral interfaces; 32 bit; 32-bit bus; 64 bit; 64-bit bus; AHB; AHB/PCI bridge design; AMBA; CMOS library; PCI local bus; RTL level; SoC design; Synopsys software; address space mapping; advanced microcontroller bus architecture; control signal mapping; high-performance high clock frequency system modules; high-performance system backbone bus; highly integrated peripheral controller components; interconnect mechanism; multiplexed address lines; multiplexed data lines; Bridges; Buffer storage; Clocks; Control systems; Frequency; Master-slave; Microcontrollers; Microelectronics; Topology; Writing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2001. Proceedings. 4th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    0-7803-6677-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2001.982629
  • Filename
    982629