Study on UIO sequence generation for sequential machine´s functional test

Author

Sun, Haiping ; Gao, Minglun ; Liang, Alei

Author_Institution

Inst. of VLSI Design, Hefei Univ. of Technol., China

fYear

2001

fDate

2001

Firstpage

628

Lastpage

632

Abstract

Unique input/output (UIO) sequence is a basic element to generate vector sequences for a sequential machine´s functional test, which arises in many applications, such as VLSI design and communication protocols. A new heuristic algorithm based on distinguishable state group (DSG) is proposed in this paper to optimize UIO sequences generation. The optimizing methods, including a insertion strategy based on a specified ´less´ relation, several pruning strategies, and a novel store mechanism of multiple OPEN/CLOSED lists, are also presented. Experimental results show that the proposed algorithm greatly improves the efficiency of the UIO sequence calculation in terms of both the time and space complexities

Keywords

VLSI; automatic testing; binary sequences; computational complexity; integrated circuit testing; logic testing; sequential machines; UIO sequence generation; VLSI design; communication protocols; distinguishable state group; functional test; heuristic algorithm; insertion strategy; multiple OPEN/CLOSED lists; pruning strategies; sequential machine; space complexities; store mechanism; time complexities; vector sequences; Application software; Automata; Computer science; Optimization methods; Postal services; Protocols; Sequential analysis; Sun; System testing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2001. Proceedings. 4th International Conference on

Conference_Location

Shanghai

Print_ISBN

0-7803-6677-8

Type

conf

DOI

10.1109/ICASIC.2001.982642

Filename

982642