DocumentCode
2228474
Title
The design of a high performance and low power embedded microprocessor core OM80C51
Author
Feng, Shi ; Yuanqing, Ge ; Runde, Zhou
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear
2001
fDate
2001
Firstpage
765
Lastpage
768
Abstract
OM80C51 is an embedded microprocessor core compatible with 80C51. But some of its performances are better than those of 80C51. For instance, it has shorter instruction cycles for most instructions, a more efficient power management system, and a customizable interrupt system and periphery circuits, with an area of about 7500 gates. All of the above make it attractive for embedded system applications. Many of these attainments can attribute to the divide-and-conquer methodology used in the design of OM80C51. It has been verified by FPGA
Keywords
divide and conquer methods; embedded systems; integrated circuit design; low-power electronics; microprocessor chips; FPGA; OM8OC51; divide-and-conquer methodology; embedded microprocessor core; instruction cycle; interrupt system; low power design; periphery circuit; power management system; Circuits; Costs; Decoding; Electronics packaging; Embedded system; Energy management; Microelectronics; Microprocessors; Power system management; Protocols;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982675
Filename
982675
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