A debug sub-system for embedded-system co-verification

With the development of VLSI, embedded system is growing sharply. A new methodology, Co-design, appeared to meet needs of embedded system designing. System designers require good EDA tools, which support Co-design methodology. Debug is an important part of design process, so we improved a debug subsystem to fit Co-design. Different from traditional software debug tools, the new debug system was designed to reflect the real and comprehensive status of an embedded system. To achieve this goal, we add a little circuit to original system. The circuit will control the debug process, and collect information that designer focuses. The information covers software and hardware information. All errors, including errors across boundary between software and hardware, will be detected. This debug sub-system have implemented on a co-verification platform. The platform based on a FPGA emulator, so the debug sub-system can be implemented and reconfigured very quickly